1. Field of the Invention
This invention relates to a semiconductor device and a method of producing the same, and more particularly to a semiconductor device wherein an inductor element is provided on a semiconductor substrate and a method of producing the semiconductor device.
2. Description of the Related Art
In an LSI in recent years, it is important to form, as internally incorporated elements, active elements such as MOS transistors and bipolar transistors as well as passive elements such as resistors, capacitors and inductors.
Particularly, as an element which constitutes a filter or a like device for use in a radio frequency band from several hundreds MHz to 1 GHz or more, an inductor L is an important element together with a capacitor C.
An inductor element incorporated in an LSI is conventionally formed from, as shown in FIG. 1, metal wiring M, for example, an aluminum wiring, extending spirally substantially in a plane. The inductance of the inductor element varies depending upon outer dimension Y, turn number n and wiring width W and wiring distance S. A relationship between outer dimension Y and inductance value L where, for example, W=S=20 .mu.m and n=3.5 turns is illustrated in FIG. 2.
As one of the indices which represent the performance of the inductor described above, there is a value called Q (quality factor). It can be said that, as the quality factor Q increases, the inductance component becomes purer, that is, the inductor approaches an ideal inductor. The quality factor Q is represented, from an angular frequency .omega.(.omega.=2.pi.f, f: frequency), an inductance L and a wiring resistance Rm of the spiral inductor element, by the following expression: EQU Q=.omega.L/Rm first expression
From the expression above, it can be considered that the quality factor Q is a ratio between the impedance component and the resistance component, and in order to raise the quality factor Q, it is a matter of course that the inductance value L must be raised as high as possible, and besides the resistance component, that is, the parasitic resistance of the spiral wiring, must be reduced.
An equivalent circuit of the inductor is shown in FIG. 3(A), and a vector diagram corresponding to the equivalent circuit is shown in FIG. 3(B). It can be seen from FIG. 3(B) that, since tan.delta. increases and a displacement in phase between the voltages at the opposite ends of the inductance element increases as the resistance component increases, also from this point, it can be said that reduction of parasitic resistance R is important for improvement in performance of the inductor element. It is to be noted that tan.delta. is a reciprocal number to the quality factor Q and called dielectric loss or loss factor, and represents the loss of the inductor. Further, in FIGS. 3(A) and 3(B), reference character VL denotes a voltage by the inductance, VR a voltage by the resistance component, L an inductance, R a parasitic resistance, and C a distributed capacity.
The relationship between the voltage across the inductor element and the current is given by the following expression: EQU V=I.omega.L.multidot.sin(.omega.t+.delta.) second expressio n
Ideally .delta.=0 degrees, but if a parasitic resistance component is present, then a displacement in phase is produced by .delta..
In order to raise the quality factor Q of an inductor, principally the following two methods have been proposed. First, the value of the inductance L of the first expression above is raised. In other words, this method increases the wiring length of the inductor formed from a metal wiring layer extending in a spiral configuration substantially in a plane to increase the number of turns. With this method, however, the occupying area of the inductor increases in a limited area of an LSI chip, and for example, where it is desired to obtain an inductance value higher than 10 nH, if the number of turns is 3.5, then outer dimension a becomes approximately 0.6 mm as seen from FIG. 2, which makes a significant obstacle to high integration of other circuits. Further, if the wiring length is increased simply, wiring resistance Rm increases, resulting in drop of the quality factor Q on the contrary.
Second, the wiring resistance Rm of the denominator of the first expression above is reduced. In other words, the second method increases the thickness of a wiring film of the inductor shown in FIG. 1. However, if the wiring film thickness is increased, a suitable mask material having a high etching selection ratio (selectivity) upon formation of a wiring, particularly upon dry etching, becomes unavailable, and where the wiring material is aluminum, the wiring film thickness can be increased only up to approximately 2 to 3 microns. Accordingly, it is difficult to remarkably decrease the wiring resistance.
Several proposals have been made to solve the disadvantages described above. For example, such an inductor element as shown in FIG. 4 is disclosed in Japanese Patent Laid-Open Application No. Showa 61-144052. Referring to FIG. 4, lower layer metal wiring layer 43 and upper layer metal wiring layer 44 are arranged alternately with inter-layer insulation film 42 interposed therebetween on insulation film 42 on a major face of semiconductor substrate 41, and end portions of each adjacent ones of them are connected to each other through a through-hole 45 formed by upper layer metal wiring layer 44, thereby constituting an inductor element which extends spirally in a horizontal direction.
Meanwhile, in Japanese Patent Laid-Open Application No. Heisei 3-263366, such an inductor element as shown in FIG. 5 is disclosed. In particular, referring to FIG. 5(A), ring-shaped first layer metal wiring layer 51, ring-shaped second layer metal wiring layer 52 and ring-shaped third layer metal wiring layer 53 are placed one on another with inter-layer insulation films 56 and 57 interposed therebetween on insulation film 59 on circuit element region 60 of semiconductor substrate 50, and end portions of them are connected to each other through through-holes 54 and 55 formed in inter-layer insulation films 56 and 57, respectively, thereby to form an inductor element extending spirally in a vertical direction.
By forming patterns of metal wiring layers spirally in a plurality of layers through through-holes formed in inter-layer insulation films on an insulation film on a substrate making use of a multi-layer wiring technique to construct an inductor element in this manner, even if the wiring length is increased, the element occupying area does not exhibit a significant increase.
However, even if a structure with which a small occupying area of an element can be obtained is obtained making use of those methods, this merely increases the effective wiring length, and consequently, the wiring resistance Rm increases and the quality factor Q decreases on the contrary.
Further, in Japanese Patent Laid-Open Application No. Heisei 3-26336 mentioned above, in order to raise inductance value L, insulation films 56' and 57' having magnetic substance layer 58 interposed therebetween are disposed between each adjacent metal wiring layers. This arrangement, however, is disadvantageous in that the process of production requires a comparatively long time since a magnetic substance layer must be provided for each wiring layer and an insulation film must be provided between each adjacent wiring layer and magnetic substance layer. Further, though not recited in the document, a magnetic substance remains in wiring regions other than that in which the inductor element is formed, and this has a bad magnetic influence on some other circuit. On the other hand, in order to remove the magnetic substance layer in the wiring regions other than that in which the inductor element is formed, an etching step by photo-lithography must be added.